The Terrifying Reality Of New TSMC's Chips

Credibility score: 75/100 — Mostly Credible. Mixed credibility - some claims are solid, others need verification.

BSmeter analyzed "The Terrifying Reality Of New TSMC's Chips" and rated it 75/100 for credibility (a BS score of 25/100 — mostly credible), on 2026-05-12. Its weakest claim — "TSMC's new chips only 6% improvement" — scored 45/100 and was flagged as dubious. 30 claims were checked against the video transcript. Scores are produced by BSmeter's AI analysis of the transcript, not independent human verification.

Claims analyzed

TSMC unveiled 14A and 12A chip tech — Solid (75/100)

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Past transistor gens gave 30-50% gains — Solid (80/100)

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TSMC's new chips only 6% improvement — Dubious (45/100)

6%? That's a suspiciously round number with zero math shown 🚩

Moore's Law now just 6% gains vs past 30-50%, AI needs 100x compute — Solid (75/100)

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Scaling breaking at single-digit nm due to electron tunneling — Verified (90/100)

✅

TSMC introduced A14/A13/A12 nodes, 6% transistor gain — Solid (80/100)

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FinFET controls channel from 3 sides, now switched to nanosheets GAA — Verified (95/100)

✅👌

TSMC shifting to mega chips instead of shrinking transistors — Solid (85/100)

Spot on shift to advanced packaging 👌

Transistor reinvented: FinFETs ~10yrs ago, now GAA — Solid (85/100)

✅

EUV reticle limit is 26x33mm max chip size — Verified (98/100)

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TSMC building 14-40 reticle mega chips with chiplets — OK (65/100)

Direction right, exact reticle #'s fuzzy ⚠️

Shrinking transistors gives only 6% gains, advanced packaging gives orders of magnitude more — Solid (80/100)

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TSMC saying no to High-NA EUV for now, costs $400M per tool — Verified (95/100)

✅💯

High-NA EUV slows throughput, adds risk, more expensive wafers; TSMC skips for now — Solid (85/100)

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TSMC using multi-patterning on existing EUV instead — Solid (80/100)

✅

TSMC optimizes for yield, cost, scale over aggressive innovation — Verified (90/100)

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Claude is the most powerful AI tool for no-code app building — Opinion (50/100)

Hype king crown goes to Claude? Subjective flex 💁‍♂️

World's first Claudaton: 2-day AI tools deep dive, 1000 free seats — Sponsored (50/100)

Claudaton promo with free seats and big promises 📣💸

Intel's D1X in Hillsboro is their most advanced development site — Verified (85/100)

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TSMC hesitates on High-NA EUV; Intel installed it for 18A process — Solid (80/100)

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High-NA EUV enables smaller features but slower, costlier, harder to control — Solid (75/100)

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PowerVia harder to manufacture due to dual-side processing — Opinion (50/100)

Fair take — complexity is real but Intel shipped it 😤

High-NA EUV works but scaling to volume at low cost is the challenge — Opinion (50/100)

Fair take — the real hurdle is yield at scale ⚖️

Panther Lake chips on 18A started shipping early 2026 — Verified (90/100)

✅

TSMC unbeatable on execution — Opinion (50/100)

Hype level: expert 💯 — but unbeatable? TSMC delays happen too 👀

Terafab project tied to Tesla, SpaceX, xAI — Solid (80/100)

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xAI/Terafab aims for output of 25 advanced fabs in one integrated system — Solid (80/100)

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Intel provides experience; Terafab provides scale and innovation — Solid (75/100)

Checks out ✓

TSMC advanced nodes sold out for years ahead — Solid (85/100)

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TSMC scales systems beyond transistors; Intel pushes transistor physics limits — Solid (85/100)

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